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C-DAC Targets Q1 FY27 For Indigenous Chiplet Tech Tape-Out

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Advancing India’s semiconductor self-reliance, C-DAC prepares to tape out its homegrown chiplet demonstrator by early FY27.

The Centre for Development of Advanced Computing (C-DAC) plans to showcase a technology demonstrator of a homegrown chiplet by the first quarter of 2026–27, representing a significant milestone in India’s high-performance computing and semiconductor journey, said SD Sudarshan, Executive Director of C-DAC Bengaluru.

The initiative aligns with India’s push to become a “product nation” with homegrown semiconductor design and manufacturing capabilities. The demonstrator will showcase a modular chipset-based architecture comprising five components, that are CPU, GPU, AI accelerator, and interconnect modules. These will offer enhanced flexibility, cost efficiency and design scalability. 

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Chiplets are small integrated circuits that can be combined to create larger systems-on-chip, allowing independent development and manufacturing of different functions such as processing and memory. 

The company expects chip designs to be ready within the next six to eight months, with infrastructure being established to validate and test the silicon. Currently, 82 startups and MSMEs are developing 85 chip designs under the Design-Linked incentive (DLI) scheme.

C-DAC’s milestone project is seen as a foundation for advanced computing and AI applications, with full prototype systems expected by 2029. 

The project underscore’s India’s growing design strength under the Semicon India programme, reflecting the government’s commitment to nurturing indigenous innovation and reducing dependency on global semiconductor supply chains.

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Vidushi Saxena
Vidushi Saxena
Vidushi Saxena is a Journalist at EFY, with a strong interest in news reporting, in-depth research, and developments shaping the business and technology landscape.

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