Eyeing a decade-long plan, Europe’s chipmakers push Brussels to sharpen the EU Chips Act for faster approvals, stronger industry input and a bigger innovation budget.
The European Semiconductor Industry Association (ESIA) is urging the European Union to adopt a 10-year semiconductor strategy supported by a dedicated budget under the proposed European Competitiveness Fund. The call comes as the European Commission completes its consultation on the review of the EU Chips Act.
ESIA says the next phase of the Chips Act must be more focused, faster, and firmly aligned with industry needs. It stresses that Europe now requires clearer long-term planning, better coordination across Member States, and policies that encourage investment, innovation, and skilled employment.
The association wants research and development (R&D) priorities to match market demand and the needs of user industries across all technology nodes. It also seeks a more structured role for industry within the European Semiconductor Board, with regular high-level dialogue to guide EU decision-making.
A persistent talent shortage remains a major concern, too. ESIA is calling for joint action to attract and retain STEM workers and to expand semiconductor-specific education across Europe.
While acknowledging the progress enabled by the 2023 Chips Act, ESIA says companies continue to face slow and inconsistent permitting procedures. It urges the EU to introduce faster, more predictable approval processes, along with an expanded First-of-a-kind state-aid framework that covers equipment and materials.
The association also recommends replacing the existing clawback clause with a reinvestment requirement to give investors greater certainty. It wants stronger early-warning systems and improved inventory planning to support supply security.
ESIA supports continuing the Chips Joint Undertaking but says future pilot lines must involve industry from the outset, shorten approval cycles, widen SME access, and build capabilities in edge AI, robotics, IoT, power-efficient chips and heterogeneous integration.
