The project is being developed in collaboration with domestic partners as well as international organisations
Rapidus Corporation has secured additional financial support from the Japanese government, with total state funding now expected to reach about $16 billion. The investment aims to accelerate the company’s efforts to produce next-generation 2-nanometer semiconductor chips.
Japan’s Economy Minister Ryosei Akazawa announced the increased subsidy during a recent company event. The occasion also marked the opening of a new test center and the launch of the “Rapidus Chiplet Solutions” division. Both facilities are located near the company’s first semiconductor plant, IIM-1, in Chitose on the island of Hokkaido.
Rapidus is building a fully integrated semiconductor ecosystem in the region. Alongside wafer production and testing facilities, the company has also established a packaging plant on the campus of Seiko Epson. Packaging is a critical step where chips are assembled into final components for use in electronic devices. This integrated approach is similar to operations by industry leader TSMC.
The company has already set up a pilot production line for early-stage wafer and chip development. It is also working on a process design kit (PDK), which helps external chip designers align their designs with Rapidus manufacturing processes. A full version of the PDK is expected to be released soon.
Rapidus plans to begin mass production of 2-nanometer chips in 2027. These advanced chips will use cutting-edge technologies such as Gate-All-Around (GAAFET) transistors and backside power delivery, which are essential for high-performance applications like artificial intelligence and autonomous vehicles.
The project is being developed in collaboration with domestic partners as well as international organisations, including IBM and the Fraunhofer Society.
