Under the government’s DLI scheme, 20 student-designed semiconductor chips from 17 institutions have been fabricated at Mohali’s SCL, says Minister Vaishnaw.
India’s young engineering talent has achieved a milestone, with 20 student-designed chips successfully fabricated at the Semi-Conductor Laboratory (SCL) in Mohali, the Ministry of Electronics and Information Technology recently confirmed.
The Union Minister Ashwini Vaishnaw highlighted the development on social media, praising the role of ‘Bharat’s Yuva Shakti’ in advancing the nation’s chip design capabilities. The chips were designed by students from 17 Indian engineering institutions, including several Indian Institutes of Technology (IITs), under the government’s Design Linked Incentive (DLI) Scheme.
The DLI Scheme, approved with a budget of ₹10 billion, aims to boost India’s semiconductor design and manufacturing ecosystem. It supports domestic companies, startups and micro, small and medium enterprises (MSMEs) in creating semiconductor products. The programme addresses high entry barriers in the sector, including lengthy development cycles and global competition.
Key support measures include access to electronic design automation (EDA) tools, intellectual property (IP) cores and infrastructure for early prototyping. Financial incentives cover up to 50% of eligible costs, capped at ₹150 million per application, for design prototyping, scaling and production.
Additional incentives of 6% to 4% of net sales turnover over five years, capped at ₹300 million per application, are available for commercial deployment.
Since its launch in December 2021, 278 academic institutions have joined the Chips to Startup (C2S) programme, while 72 startups have been granted access to advanced EDA tools under the DLI scheme.
The ministry has so far sanctioned funding to 23 companies and startups for projects ranging from surveillance cameras and energy meters to microprocessor IPs and networking solutions. Ten of these firms have secured venture capital to scale prototypes, and six have completed prototype tape-outs at various semiconductor foundries.
The government emphasised that the scheme’s implementation remains flexible, with adjustments made in consultation with stakeholders to meet evolving industry needs.
