Momentum around 3nm and upcoming 2nm technologies highlights growing industry adoption of advanced-node AI silicon.
Cadence Design Systems has expanded its long-standing partnership with Taiwan Semiconductor Manufacturing Company (TSMC) to advance the development of artificial intelligence-focused semiconductor technologies.
The collaboration will provide chipmakers with certified intellectual property, signoff-ready infrastructure and end-to-end electronic design automation (EDA) flows tailored for advanced AI silicon built on TSMC’s latest process nodes, including N3, N2, A16 and A14. The companies said the initiative is aimed at reducing design iterations, improving accuracy and accelerating time-to-market for next-generation AI and high-performance computing (HPC) chips.
Growing AI workloads and tighter development timelines are pushing semiconductor companies toward more advanced manufacturing technologies and sophisticated chip architectures such as chiplets and 3D integrated circuits. Cadence noted that many customers are already designing products on TSMC’s 3nm and emerging 2nm nodes, reflecting strong industry momentum toward advanced-node adoption.
As part of the expanded collaboration, Cadence is delivering a broad portfolio of silicon-proven IP compatible with advanced nodes, including support for high-speed memory and connectivity standards such as DDR5, LPDDR6/5X, PCIe 6.0 and next-generation high-bandwidth memory. Its foundation IP portfolio is already being used in production designs on TSMC’s 3nm process technology.
The partnership also emphasizes AI-driven chip design. Cadence is developing “agent-ready” design infrastructure that integrates artificial intelligence directly into engineering workflows, allowing automated optimization of performance, power efficiency and reliability across the chip design cycle.
Industry ecosystem partners, including Nvidia, Arm and AI chip startup Positron, highlighted the importance of deeper collaboration between design tool providers and semiconductor manufacturers to manage rising design complexity and speed up innovation.
The companies said growing customer activity at advanced nodes underscores increasing demand for integrated design flows, validated IP and advanced manufacturing solutions required to deliver the next generation of AI and HPC silicon.
