WIN Semiconductors’ latest NP 120P GaN Process Design Kit gives MMIC designers access to process models and layout rules
Keysight Technologies has partnered with WIN Semiconductors. In this collaboration, they announced a joint MMIC design workflow that enables GaN MMIC design houses to achieve first-pass tapeout success.
The workflow unifies on-chip multi-domain simulation, 3D layout and verification, and off-chip MMIC evaluation board design within a single design environment. It is designed to support the increasing number of companies developing GaN MMICs for applications such as 5G base stations, Wi-Fi access points, satellite payloads, and defence radar systems.
Since a failed tapeout can delay a project by weeks due to a foundry respin, the new workflow automates the complete simulation, optimisation, and verification process required for MMIC design sign-off. By ensuring every critical analysis is completed before submission for fabrication, it helps reduce design risks, accelerate time-to-market, and improve first-pass success rates.
MMIC customers will not commit to purchase until they can measure performance on a physical evaluation board comprising the MMIC, packaging, PCB, and test connectors. The workflow lets engineers design and optimise these on-chip and off-chip components together, so that performance meets specifications as verified with test equipment. With the global GaN RF device market projected to reach $2.77 billion by 2031, MMIC design houses that cannot prove performance on the evaluation board risk losing their share of that growth.
WIN Semiconductors’ latest NP 120P GaN Process Design Kit gives MMIC designers access to process models and layout rules. These models within Keysight Advanced Design System (ADS) and RF Circuit Simulation Professional automate the workflow to achieve first pass MMIC tapeout.
Richard Kuo, Director of Design Service, WIN Semiconductors, said: “We are delighted to collaborate with Keysight to deliver a customised LVS solution within the WIN ADS PDK. By combining Keysight’s ADS expertise with WIN’s robust PDK and advanced process technology, we provided a comprehensive verification solution that streamlined the customer’s design flow and accelerated the time-to-market for advanced RF products with greater confidence and reliability.”
Nilesh Kamdar, General Manager, EDA, Design Engineering Software, Keysight, said: “WIN’s complete PDK, combined with Keysight’s simulation and verification tools, gives designers a single path from chip design through evaluation board. Design houses can now prove full system performance before fabrication, giving their customers the confidence to commit.”
