The startup plans to utilise this grant for its Dolomite core series featuring vector co-processors optimised for accelerating AI inference tasks.
InCore Semiconductors has become the latest recipient of the coveted Design Linked Incentive (DLI) Scheme grant from the Ministry of Electronics and IT (MeitY). With this, the number of startups supported under the DLI scheme has risen to sixteen.
The scheme is part of the government’s ambitious $10 billion incentive program launched in December 2021 to build a robust semiconductor ecosystem in India. InCore plans to utilise the grant to develop its next-generation high-performance computing processor featuring superscalar in-order architecture, with deeper pipeline stages and integrated vector co-processors optimised for accelerating AI inference tasks.
“After Azurite and Calcite cores, we plan to utilise this grant for our next project — our Dolomite core series, which will target Cortex A-55 in performance and can be used in entry-level smartphones, high-end IP cameras, edge-AI devices, advanced driver assistance systems (ADAS), avionics, networking, and high-performance wearables,” the startup told EFY.
The total grant is worth ₹15 crores on a total project cost of up to ₹30 crores, with some restrictions on the total workforce component. “Being awarded the DLI grant is not just a recognition of our work, but also a testament to the alignment of our vision with the Government of India’s mission to strengthen the domestic semiconductor ecosystem,” said CEO GS Madhusudan.
In an earlier conversation with EFY, Neel Gala, CTO of InCore Semiconductors, highlighted the critical support the DLI scheme offers startups. “I believe the biggest benefit of the DLI scheme is the government’s support in terms of EDA tools. They’ve partnered with major vendors like Synopsys, Cadence, and Siemens, covering the upfront costs so startups don’t have to bear that financial burden. We certainly benefited from this. Our entire tape-out process was done free of charge, thanks to the EDA tool grid provided by Synopsys and Cadence. Otherwise, we would have easily spent $100,000–$200,000, which is a huge expense for any startup,” he said.
The Dolomite series is expected to launch in the second half of 2025, with a test tapeout of the design scheduled for 2026. This will mark InCore’s second tapeout, following their first tapeout of their Azurite and Calcite series of embedded processors in September 2024.
The DLI scheme has gone beyond tool access to include a comprehensive support system, such as tutorials, webinars, and regular interactions with industry stakeholders. Gala praised the government for its proactive efforts in revising policies and boosting collaboration. “Recently, we had a roundtable discussion with IESA, CDAC, and MeitY. The turnout was fantastic, and there were plenty of insightful queries. They are actively revising policies to make the process more accessible for other startups,” he added.
As one of the leading proponents of RISC-V technology, InCore will also offer flexible licensing options for its first series of embedded processors. The startup aspires to make high-performance RISC-V cores and accelerators more accessible to design teams, enabling next-generation embedded systems.
The government’s emphasis on semiconductor design as a fabrication precursor has garnered industry experts’ praise. Gala noted, “While there’s a strong push to build fabs in India, this is the perfect time for the government to focus on design, which will eventually feed those fabs. It would be unrealistic to expect foreign countries like China to provide designs for our fabs. We must develop our designs, and the DLI is an important step in achieving that.”
