Indian fabless design start-up signs OSAT pact to streamline assembly, testing, and advanced packaging for low-power silicon.
Homegrown fabless semiconductor start-up IndieSemiC has signed a Memorandum of Understanding (MoU) with Kaynes Semicon to establish a local outsourced semiconductor assembly and test (OSAT) framework.
The agreement creates a structured pipeline for the qualification, assembly, and testing of Quad Flat No-lead (QFN), Ball Grid Array (BGA), and other custom semiconductor packaging solutions. The infrastructure will directly support IndieSemiC’s expanding line-up of ultra-low-power, compact System-in-Package (SiP) modules and discrete semiconductor devices.
Beyond standard assembly and testing, the two firms plan to collaborate on Design for Manufacturability (DfM), customized SiP and package co-development, and New Package Introduction (NPI) strategies. By combining domestic chip design with local OSAT operations, the partnership aims to bridge the gap between design concepts and high-volume manufacturing within a single, integrated Indian ecosystem.
Nikul Shah, Founder and Chief Executive of IndieSemiC, noted that the collaboration reflects a critical transition for India’s semiconductor sector, moving away from isolated capabilities towards a fully integrated value chain where design and backend manufacturing operate in lockstep.
Echoing this, Kaynes Semicon Chief Executive Raghu Panicker highlighted that providing tailored packaging qualification, DfM, and NPI support will significantly accelerate the timeline required to take innovative, ultra-low-power silicon from initial design to commercial scale.
