As India raises security requirements for surveillance equipment, chip design is becoming increasingly relevant to trusted cameras and their supply chains.
What happens when the security requirements of a surveillance camera begin influencing the chip inside it? India’s CCTV security framework identifies the SoC, firmware, PCBA, network interface, and physical interfaces as security-critical components, while also requiring verification of trusted sourcing for critical hardware.
In an exclusive interaction at SEMICON India 2026, StraitsMicro, a Singapore-based fabless semiconductor company, said it is responding by putting security directly into the hardware of its surveillance silicon. Its architecture is planned to include six security layers, with 1024-bit configurations for lower-end devices and 2048-bit configurations for higher-end systems.
“We are not relying on software for security. We are going to implement security in the hardware, on the chip itself,” said Pankaj Sharma, Founder and CEO, StraitsMicro.
StraitsMicro said STQC-related requirements are also being considered during development, with Sharma describing close engagement with expertise familiar with the certification framework. This puts security requirements closer to the architecture stage rather than leaving them solely to the camera-level certification process.
The chip is also being shaped with prospective customers. Through an early-adoption programme, StraitsMicro is engaging camera manufacturers and ecosystem partners to define specifications before production silicon is finalised. The approach could allow OEM requirements to influence the silicon before products are designed around it.
That segmentation also reflects the company’s decision to develop different configurations for different camera segments rather than rely on one chip across the range. Its previously unveiled Visora family spans entry-level and mid-range cameras, high-end surveillance, and network video recorder applications. The company is also planning around low-power DDR5 memory for applications such as battery-operated cameras and dashcams, Sharma said.
The company expects customer design-ins for its Edge and Secure variants towards the end of 2027, with the higher-end Professional and Network variants targeted for 2028. Beyond surveillance, Sharma said the company is exploring other security-focused silicon, including fingerprinting and potential defence applications.
So, what will it take to move security-focused surveillance silicon from architecture to cameras deployed at scale? Which OEMs, EMS partners, and technology providers will shape the production platform, and how much security can realistically be pushed into the chip itself? In a longer interaction, Sharma discussed the company’s hardware-security architecture, STQC engagement, OEM co-development model, Visora’s path towards design-ins, and its plans for security-focused silicon beyond surveillance.
