The two-day event will focus on indigenous processor technologies, secure computing, AI hardware, and the growing RISC-V ecosystem.
The Indian Institute of Technology Madras (IIT Madras) will host the third Digital India RISC-V (DIR-V) Symposium on 1–2 August 2026 at the IIT Madras Research Park in Chennai. The event is being organised in partnership with the Ministry of Electronics and Information Technology (MeitY), Government of India, and RISC-V International.
With this year’s theme, ‘Empowering Bharat’s Semiconductor Future’, the symposium will bring together policymakers, technology experts, researchers, startups, industry leaders, investors, faculty members, and students to discuss India’s semiconductor ambitions.
The event will focus on indigenous processor technologies, secure computing systems, hardware innovation, artificial intelligence, and the expanding RISC-V ecosystem. It is aligned with India’s broader vision of becoming a trusted global hub for semiconductor design, electronics manufacturing, and secure digital infrastructure.
Prof. V. Kamakoti, Director, IIT Madras, said the DIR-V Symposium was established to bring together government, industry, academia, startups, and researchers to strengthen India’s indigenous computing capabilities.
According to him, the response to the first two editions has demonstrated India’s intellectual and innovation capabilities in semiconductor technologies. He added that secure and trusted semiconductor technologies have become a strategic national priority as the country’s digital economy expands.
The two-day programme will include keynote addresses, technical sessions, panel discussions, hands-on workshops, technology demonstrations, exhibitions, startup showcases, and networking sessions. The DIR-V Grand Challenge Hackathon will also feature solutions developed by students and startups using RISC-V technologies.
Participants will have opportunities to interact with experts from academia, government, industry, RISC-V International, and India’s semiconductor ecosystem. They can also explore live demonstrations and startup exhibits focused on processor design, semiconductor technologies, embedded systems, AI hardware, and cybersecurity.
Registrations for the symposium are open until 28 July 2026. By promoting collaboration around the open RISC-V architecture, IIT Madras aims to support indigenous processor development, deep-tech entrepreneurship, and semiconductor workforce development in India.
