Tata’s Dholera Fab Joins SCL Mohali In Chip Prototype Support

With Dholera joining Mohali, India eyes to move chip tape-outs onshore, cutting startup dependence on overseas fabs and strengthening the domestic semiconductor design-to-manufacturing pipeline.

India’s semiconductor startups will soon gain domestic fabrication support at more advanced technology nodes, as Tata Electronics’ upcoming plant in Dholera joins the state-run Semi-Conductor Laboratory (SCL) in Mohali in enabling chip design tape-outs.

Union minister for electronics and information technology Ashwini Vaishnaw said on January 27, 2026, that the Dholera facility will support tape-outs for chips in the 28-nanometre to 90-nanometre range, complementing SCL Mohali’s existing 180-nanometre capability.

Together, the two fabs are expected to cover technologies used in a large share of chips produced globally within the next few years.

Tape-out marks a critical stage in chip development, when a finalised design is sent to a fabrication unit to produce initial prototypes for testing. At present, many Indian startups depend on overseas foundries such as Taiwan Semiconductor Manufacturing Company (TSMC) and GlobalFoundries to access this stage, increasing costs and limiting hands-on testing and failure analysis.

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Vaishnaw was addressing an industry gathering in New Delhi, where he met 24 chip design firms selected under the government’s Design Linked Incentive (DLI) scheme. He said 14 of these startups have secured venture capital funding of around ₹4.3 billion, indicating growing investor confidence in India’s chip design ecosystem.

Currently, SCL Mohali supports startups and academic institutions primarily through multi-project wafers, a shared, cost-effective method for prototyping chips. However, its older technology restricts work on more advanced designs. The government has announced plans to modernise the facility over three years with an investment of ₹45 billion.

Industry executives welcomed the proposed role of the Dholera fab but stressed the importance of competitive pricing. They said tape-out costs must align with global benchmarks for startups to benefit fully.

Vaishnaw also outlined longer-term ambitions. India aims to achieve manufacturing capability for 3-nanometre chips by 2032, with plans to move to 2 nanometres thereafter. Under the next phase of the DLI scheme, the government will prioritise six chip categories and target support for 50 fabless startups.

Startups, meanwhile, have sought higher funding for mass production and better market access as they move beyond design and tape-out towards commercial deployment.

Read more: Startups Achieve 12nm Chip Tape-Outs Under DLI, Government Reviews

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Shubha Mitra
Shubha Mitra
Shubha Mitra is an Assistant Editor at EFY, keenly interested in policies and developments shaping the electronics business.

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